
Edoardo Bonizzoni was born in Pavia, Italy, in 1977. He received the Laurea degree (summa cum laude) in Electronic Engineering from the University of Pavia, Italy, in 2002. From the same University, he received in 2006 the Ph.D. degree in Electronic, Computer, and Electrical engineering.
In 2002 he joined the Integrated Microsystems Laboratory of the University of Pavia as a Ph.D. candidate. During his Ph.D., he worked on development, design and testing of nonvolatile memories with particular regard to phasechange memories. From 2006 his research interests are mainly focused on the design and testing of DCDC and A/D converters. In this period he worked on singleinductor multipleoutput DCDC buck regulator solutions and on both Nyquistrate and oversampled A/D converters. Recently, his research focuses on the design of high precision amplifiers and ultralow voltage voltage reference circuits as well. Presently, he is an Assistant Professor at the Department of Electrical, Computer, and Biomedical Engineering of the University of Pavia.
Dr. Bonizzoni is corecipient of the IEEE/IEEJ Analog VLSI Workshop(AVLSIWS) 2010 best paper award, of the IEEE European SolidState Circuits Conference (ESSCIRC) 2007 best paper award and of the IEEE/IEEJ Analog VLSI Workshop (AVLSIWS) 2007 best paper award.
Since 2012, he is an Associate Editor of the IEEE Transactions on Circuits and Systems  Part. II. Dr. Bonizzoni has been nominated Best TCASII Associate Editors for the 20122013 term. Since 2013 he is a TPC member of the IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME). He is IEEE member from 2006.
Pubblications
Book Chapters
* M. Belloni, E. Bonizzoni, and F. Maloberti, “SingleInductor MultipleOutput DCDC Converters"; Book chapter of "Analog Circuit Design, High Speed Clock and Data Recovery, High Performance Amplifiers and Power Management", edited by M. Steyaert, A.H.M. Van Roermund, and H. Casier, Springer Science+Businness Media 2008, pp. 233253, ISBN 9781402089435.
Thesis
* E. Bonizzoni, “Phasechange memories”, Ph.D. Thesis, University of Pavia, 2006.
* E. Bonizzoni, “Model and algorithm for design of maximumefficiency Dickson charge pumps”, Laurea Degree Thesis, University of Pavia, 2002.
Journal Papers
*
A. Pena Perez, E. Bonizzoni, and F. Maloberti, "A 88 dB DR, 84 dB SNDR Very LowPower Single OpAmp ThirdOrder SigmaDelta Modulator", IEEE Journal of SolidState Circuits, vol. 47, pp. 21072118, Sept. 2012.
* O.Belotti, E. Bonizzoni, and F. Maloberti, "Exact Design of ContinuousTime SigmaDelta Modulators with Multiple Feedback DACs", Analog Integrated Circuits and Signal Processing, DOI 10.1007/s104700129866z, vol. 73, pp. 255264, 2012.
* N. Kumar Y.B., E. Bonizzoni, A. Patra, and F. Maloberti, "Twopath double delay line based bandpass quadrature ΣΔ modulator," IET Electronics Letters, vol. 47, pp. 1316–1317, Nov. 2011.
* H. Caracciolo,E. Bonizzoni, P. Malcovati, and F. Maloberti, "70MHz IF 10MHz bandwidth bandpass sigmadelta modulator for WCDMA applications," Analog Integrated Circuits and Signal Processing, On Line First October 2011, DOI 10.1007/s1047001197952, vol. 71, no. 3, pp. 411419, June 2012.
* A. Agnes, E. Bonizzoni, and F. Maloberti, "Highresolution multibit secondorder incremental converter
with 1.5mV residual offset and 94dB SFDR," Analog Integrated Circuits and Signal Processing, On line first, DOI 10.1007/s1047001197520, vol. 72, pp. 531539, Sept. 2012..
* M. Belloni, E. Bonizzoni, A. Fornasari, and F. Maloberti, “A Micropower ChopperCDS Operational Amplifier”, IEEE Journal of SolidState Circuits, vol. 45, n. 12, pp. 25212529, Dec. 2010.
* E. Bonizzoni, A. Pena Perez, F. Maloberti, and M.A. GarciaAndrade, “Two OpAmps ThirdOrder SigmaDelta Modulator with 61dB SNDR, 6MHz Bandwidth and 6mW Power Consumption”, Analog Integrated Circuits and Signal Processing, DOI: 10.1007/s1047001095389, vol. 66, pp. 381388, 2011.
* A. Agnes, E. Bonizzoni, P. Malcovati, and F. Maloberti, "An UltraLow Power Successive Approximation A/D Converter with TimeDomain Comparator", Analog Integrated Circuits and Signal Processing, vol. 64, pp. 183190, August 2010.
* M. Belloni, E. Bonizzoni, P. Malcovati, and F. Maloberti, " A High Efficiency 4Output Single Inductor DCDC Buck Converter with Self Boosted Snubber ", Analog Integrated Circuits and Signal Processing, DOI: 10.1007/s1047001095709, vol. 67, pp. 169177, 2011.
* E. Bonizzoni, F. Borghetti, P. Malcovati, and F. Maloberti, “A 200mA, 93% Peak Power Efficiency, SingleInductor, DualOutput DCDC Buck Converter”, Analog Integrated Circuits and Signal Processing, vol. 62, no. 2, pp. 121129.
* I. Galdi, E. Bonizzoni, P. Malcovati, G. Manganaro, and F. Maloberti, “40MHz IF 1MHz Bandwidth TwoPath BandPass ΣΔ Modulator with 72dB DR Consuming 16 mW”, IEEE Journal of SolidState Circuits, vol. 43, no. 7, pp. 16481656, July 2008.
* F. Bedeschi, C. Boffino, E. Bonizzoni, C. Resta, and G. Torelli, “Staircase Down SET Programming Approach for PhaseChange Memories”, ELSEVIR Microelectronics Journal, 38, pp. 10641069, 2007.
* F. Bedeschi, R. Bez, C. Boffino, E. Bonizzoni, E. Buda, G. Casagrande, L. Costa, M. Ferraro, R.Gastaldi, O. Khouri, F. Ottogalli, F. Pellizzer, A. Pirovano, C. Resta, G. Torelli, and M. Tosi, “4 Mbit MOSFETselected µtrench phasechange memory experimental chip”, IEEE Journal of SolidState Circuits, vol. 40, no. 7, pp. 15571565, July 2005.
Conference Papers
* Y. Liu, E. Bonizzoni, A. D'Amato, and F. Maloberti, "A 105dB SNDR, 10 kSps MultiLevel SecondOrder Incremental Converter with SmartDEM Consuming 280 uW and 3.3V Supply", Proc. of IEEE European SolidState Circuits Conference (ESSCIRC), pp. 371374, Sept. 2013.
* H. Heidari, U. Gatti, E. Bonizzoni, and F. Maloberti, "LowNoise LowOffset CurrentMode Hall Sensor", Proc. of IEEE Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 325328, June 2013.
* O. Belotti, E. Bonizzoni, F. Maloberti, "Design of a ThirdOrder ΣΔ Modulator with Minimum OpAmps Output Swing", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 821824, May 2013.
* Y. Liu, E. Bonizzoni, F. Maloberti, "HighOrder MultiBit Incremental Converter with SmartDEM Algorithm", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 157160, May 2013.
* Y.B. Nithin Kumar, H. Caracciolo, E. Bonizzoni, A. Patra, F. Maloberti, "A 1.96mW, 2.6MHz Bandwidth Discrete Time Quadrature BandPass ΣΔ Modulator", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 19982001, May 2013.
* Y.B. Nithin Kumar, E. Bonizzoni, A. Patra, F. Maloberti, "TwoPath Quadrature Cascaded BandPass SigmaDelta Modulators", 26th International Conference on VLSI Design, VLSI Design 2013, pp. 221226, Jan. 2013. * E. Bonizzoni, A. Pena Perez, H. Caracciolo, D. Stoppa, and F. Maloberti, "An Incremental ADC Sensor Interface with Input SwitchLess Integrator Featuring 220nVrms Resolution with +/30mV Input Range", Proc. of IEEE European SolidState Circuits Conference (ESSCIRC), pp. 389392, Sept. 2012.
* N. Kumar Y.B., E. Bonizzoni, A. Patra, and F. Maloberti, "Interference Rejection in Delay Line Based Quadrature BandPass ΣΔ Modulators", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 30053008, May 2012.
* O. Belotti, E. Bonizzoni, and F. Maloberti, "A 1V 1.1MHz BW Digitally Assisted MultiBit MultiRate Hybrid CT ΣΔ with 78dB SFDR", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 289292, May 2012.
* N. Kumar Y.B., E. Bonizzoni, A. Patra, and F. Maloberti, "Twopath delay line based quadrature band pass ΣΔ modulator", Proceedings of IEEE/IEEJ Analog VLSI Workshop (AWVLSI), pp. 65–69, Nov. 2011.
* Y. Liu, E. Bonizzoni, and F. Maloberti, "Digital assisted highorder multibit analog to digital ramp converters," Proceedings of IEEE European Conference on Circuit Theory and Design (ECCTD), pp. 593–596, Aug. 2011.
* O. Belotti, E. Bonizzoni, and F. Maloberti, "Monorate and multirate hybrid continuoustime ΣΔ
modulators with SC feedback DAC," Proceedings of IEEE International Symposium on Signals, Circuits
and Systems (ISSCS), June 2011.
* A. Pena Perez, E. Bonizzoni, and F.Maloberti, “A LowPower ThirdOrder SigmaDelta Modulator Using a Single Operational Amplifier”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 13711374, May 2011.
* A. Pena Perez, E. Bonizzoni, and F.Maloberti, “A 84dB SNDR 100kHz Bandwidth LowPower Single OpAmp ThirdOrder SigmaDelta Modulator Consuming 140µW”, IEEE International SolidState Circuits Conference (ISSCC) Dig. Tech. Papers, 477478, Feb. 2011.
* V.R. GonzalezDiaz, E. Bonizzoni, and F.Maloberti, “Pseudorandom Sequence Generation for Mismatch Analog Compensation of ADCs”, Proc. of IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 118121, Dec. 2010.
* A. Pena Perez, O. Belotti, E. Bonizzoni, and F.Maloberti, “A Two OpAmps ThirdOrder ΣΔ Modulator with Complex Conjugate NTF Zeros”, Proc. of IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 689692, Dec. 2010.
* A. Agnes, E. Bonizzoni, A. D'Amato, I. Galdi, F. Maloberti, "HighResolution MultiBit Incremental Converter with 1.5µV Residual Offset and 94dB SFDR", Proc. of IEEE/IEEJ International Analog VLSI Workshop (AVLSIWS), pp. 103106, Sept. 2010. (Best paper award)
* M. Belloni, E. Bonizzoni, F. Maloberti, A. Fornasari: "LowPower RippleFree Chopper Amplifier with Correlated Double Sampling DeChopping", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 765768, May 2010.
* H. Caracciolo, E. Bonizzoni, P. Malcovati, F. Maloberti: "Design of a 70MHz IF 10MHz Bandwidth Bandpass ΣΔ Modulator for WCDMA Applications", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 24062409, May 2010.
* H. Caracciolo, E. Bonizzoni, F. Maloberti, G.S. La Rue: "Digitally Assisted MultiBit ΣΔ Modulator", Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 39933996, May 2010.
* M. Belloni, E. Bonizzoni, A. Fornasari, and F. Maloberti, “A Micropower ChopperCorrelated DoubleSampling Amplifier with 2µV Standard Deviation Offset and 37nV/sqrt(Hz) Input Noise Density”, IEEE International SolidState Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 7677, Feb. 2010.
* F. Maloberti, E. Bonizzoni, and A. Surano, “Time Variant Digital SigmaDelta Modulator for FractionalN Frequency Synthesizers”, Proc. of IEEE RadioFrequency Integration Technology (RFIT), pp. 111114, Dec. 2009.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “High Efficiency DCDC Buck Converter with 60/120MHz Switching Frequency and 1A Output Current”, Proc. of IEEE European SolidState Circuits Conference (ESSCIRC), pp. 452455, Sept. 2009.
* S. Noli, A. Perez, E. Bonizzoni, and F. Maloberti, “SigmaDelta Time Interleaved Current Steering DAC with Dynamic Elemnts Matching”, Proc. of IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 407410, Aug. 2009.
* A. Surano, E. Bonizzoni, and F. Maloberti, “OnChip Sine Wave Frequency Multiplier for 40GHz Signal Generator”, Proc. of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 284287, July 2009.
* A. Perez, N. Kumar Y.B., E. Bonizzoni, and F. Maloberti, “SlewRate and Gain Enhancement in TwoStage Operational Amplifiers”, Proc. of International Symposium on Circuit and Systems (ISCAS), pp. 24852488, May 2009.
* E. Bonizzoni, A. Perez, F. Maloberti, and M. GarciaAndrade, “ThirdOrder ΣΔ Modulator with 61dB SNR and 6MHz Bandwidth Consuming 6 mW”, Proc. of IEEE European SolidState Circuits Conference (ESSCIRC, pp. 218221, Sept. 2008.
* E. Bonizzoni, A. Perez, and F. Maloberti, “NonConventional ΣΔ Architectures for Very LowPower and Medium Resolution Applications”, Proc. of IEEE/IEEJ International Analog VLSI Workshop (AVLSIWS), pp. 135139, July 2008.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “On the Design of SingleInductor DoubleOutput DCDC Buck, Boost, BuckBoost Converters”, Proc. of IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 626629, Sept. 2008.
* F. Erario, A. Agnes, E. Bonizzoni, and F. Maloberti, “Design of an UltraLow Power Time Interleaved SAR Converter”, Proc. of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 245248, June 2008.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “A VoltagetoPulse Converter for Very High Frequency DCDC Converters”, Proc. of IEEE International Symposium on Power Electronics, Electrical Drives, Automation and Motion (SPEEDAM), pp. 789791, June 2008.
* M. Belloni, E. Bonizzoni, and F. Maloberti, “On the Design of SingleInductor MultipleOutput DCDC Buck Converters”, Proc. of International Symposium on Circuit and Systems (ISCAS), pp. 30493052, May 2008.
* A. Agnes, E. Bonizzoni, and F. Maloberti, “Design of an UltraLow Power SAADC with Medium/High Resolution and Speed”, Proc. of International Symposium on Circuit and Systems (ISCAS), pp. 14, May 2008.
* H. Caracciolo, I. Galdi, E. Bonizzoni, and F. Maloberti, “BandPass SigmaDelta Architectures with Single and Two Parallel Paths”, Proc. of International Symposium on Circuit and Systems (ISCAS), pp. 16561659, May 2008.
* M. Belloni, E. Bonizzoni, E. Kiseliovas, P. Malcovati, F. Maloberti, T. Peltola, and T. Teppo, “A 1.2A Output Current SingleInductor 4Output DCDC Buck Converter with SelfBoosted Switch Drivers”, IEEE International SolidState Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 444626, Feb. 2008.
* A. Agnes, E. Bonizzoni, P. Malcovati, and F. Maloberti, “A 9.4 ENoB, 1V, 3.8mW, 100 kS/s SARADC with TimeDomain Comparator”, IEEE International SolidState Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 246610, Feb. 2008.
* H. Caracciolo, E. Bonizzoni, and F. Maloberti, “QuasiSecond Order ΣΔ Modulator Based on PhaseIntegration”, Proc. of IEEE/IEEJ International Analog VLSI Workshop (AVLSIWS), pp. 1922, Nov. 2007. (Best paper award)
* I. Galdi, E. Bonizzoni, F. Maloberti, G. Manganaro, and P. Malcovati, “Twopath bandpass ΣΔ modulator with 40MHz IF 72dB DR at 1MHz bandwidth consuming 16 mW”, Proc. of IEEE European SolidState Circuits Conference (ESSCIRC), pp. 248 – 251, Sept. 2007. (Best paper award)
* A. Lombardi, P. Malcovati, A. Basto, E. Bonizzoni, and F. Maloberti, “An optimized two stage low power sinc3 filter for ΣΔ modulators”, Proc. of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 8184, July 2007.
* I. Galdi, E. Bonizzoni, and F. Maloberti, “Design of a currentmode 6bit 100 MS/s flash A/D converter with 0.75 pJ/convlev FoM”, Proc. of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 6972, July 2007.
* A. Lombardi, E. Bonizzoni, P. Malcovati and F. Maloberti, “A low power sinc3 filter for ΣΔ modulators”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 40084011, May 2007.
* E. Bonizzoni, F. Borghetti, P. Malcovati, F. Maloberti, and B. Niessen, “A 200mA 93% peak efficiency singleinductor dualoutput DCDC buck converter”, IEEE International SolidState Circuits Conference (ISSCC) Dig. Tech. Papers, pp. 526527, Feb. 2007.
* F. Bedeschi, C. Boffino, E. Bonizzoni, C. Resta, G. Torelli, and D. Zella, “Setsweep programming pulse for phasechange memories”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 967970, May 2006.
* F. Bedeschi, C. Boffino, E. Bonizzoni, O. Khouri, G. Pollaccia, C. Resta, and G. Torelli, “A lowripple voltage tripler”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 27532756, May 2006.
* F. Bedeschi, E. Bonizzoni, G. Casagrande, R. Gastaldi, C. Resta, G. Torelli, and D. Zella, “SET and RESET pulse characterization in BJTselected phasechange memories”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 12701273, May 2005.
* R. Arona, E. Bonizzoni, F. Maloberti, and G. Torelli, “Heap charge pump optimisation by a tapered architecture”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), pp. 19031906, May 2005.
* F. Bedeschi, C. Boffino, E. Bonizzoni, O. Khouri, C. Resta, and G. Torelli, “Fastrecovery CMOS voltage regulator for large capacitive loads”, Proc. of IEEE International Conference on Signal and Electronic Systems (ICSES), pp. 349352, Sep. 2004.
* F. Bedeschi, C. Boffino, E. Bonizzoni, O. Khouri, C. Resta, and G. Torelli, “Bitline biasing technique for phasechange memories”, Proc. of IEEE International Conference on Signal and Electronic Systems (ICSES), pp. 229232, Sep. 2004.
* F. Bedeschi, R. Bez, C. Boffino, E. Bonizzoni, E. Buda, G. Casagrande, L. Costa, M. Ferraro, R.Gastaldi, O. Khouri, F. Ottogalli, F. Pellizzer, A. Pirovano, C. Resta, G. Torelli, and M. Tosi, “4 Mbit MOSFETselected phasechange memory experimental chip”, Proc. of IEEE European SolidState Circuits Conference (ESSCIRC), pp. 207210, Sep. 2004.
* F. Bedeschi, E. Bonizzoni, A. Fantini, C. Resta, and G. Torelli, “A lowpower lowvoltage MOSFETonly voltage reference”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), vol. 1, pp. 5760, May 2004.
* F. Bedeschi, E. Bonizzoni, O. Khouri, C. Resta, and G. Torelli, “A fully symmetrical sense amplifier for nonvolatile memories”, Proc. of IEEE International Symposium on Circuit and Systems (ISCAS), vol. 2, pp. 625628, May 2004.
* E. Bonizzoni, A. Cabrini, O. Khouri, G. Torelli, “Algorithm for Automatic Design of MaximumEfficiency Dickson Charge Pumps”, Proc. of IEEE European Conference on Circuits and Theory Design (ECCTD, vol. 2, pp.373376, Sept. 2003.
